1. Field of the Invention
The present invention relates to a data receiver, in particular to a data receiver for use in a radio LAN (Local Area Network) system standardized by IEEE (Institute of Electrical and Electronics Engineers) 802.11.
2. Description of the Background Art
Conventionally, some data receivers for use in a radio LAN system employ a method of detecting a received signal on a packet transmitted such that signals received on a transmission path are always inputted into a receiver synchronization circuit for carrying out synchronous detection. Accordingly, the successful detection of signals was merely assumed by establishing synchronization in the receiver synchronization circuit. In addition to that, ways of detecting signals have been proposed in compliance with every situation without errors.
For example, the circuit for detecting receiving timing and burst signal receiver disclosed in Japanese patent laid-open publication No. 2003-78469 aim at eliminating a conventional situation where an interference signal is erroneously received and an essential transmitted signal cannot be received, in order to transmit a highly accurate receiver timing signal. In the disclosed system, a digitalized RSSI (Received Signal Strength Indication) signal is delayed, and a sampled value of a preceding RSSI signal is used as a reference value for calculating the increment of the RSSI signal to thereafter calculate the increment based on the difference of the sampled value of an RSSI signal successively inputted from the reference value. When the increment exceeds a predetermined threshold, a detection signal is outputted to transmit a receiver timing signal.
Also, a burst signal demodulator disclosed in Japanese patent laid-open publication No. 163949/1998 is intended to automatically follow variation in a line environment without measuring the levels of the electric power of noise, interference and signal on a real line. In the burst signal demodulator disclosed, the demodulator demodulates an input signal only for the period of a burst modulation signal, and provides a UW (Unique Word) detector with demodulated data and a modulated clock. The UW detector deletes the unique word from the modulated data to then output resultant data and demodulated signal as well as to provide a counter with a UW-detected and a UW-undetected signal upon detecting and not detecting a unique word, respectively. From the counter operative with the demodulated clock, a negative-going transition detection signal is delivered to a burst signal detector. The RSSI measurement circuit smoothes an input signal to output a resultant RSSI signal to the burst signal detector. The burst signal detector is responsive to the negative-going transition detection signal, the RSSI signal and a threshold signal outputted from the threshold control, and measures the received power in a guard time to output a frame signal to the demodulator as well as to feed it back to the threshold control. The threshold is set for each guard time period, thereby making the threshold variable to control a detection threshold for the input signal to be an optimum value.
Further, a carrier detecting circuit disclosed in U.S. Pat. No. 6,671,331 to Sakuma is intended to reduce errors in detection and widen a receiver range. The carrier detecting circuit disclosed has an averaging circuit adapted to integrate, for a predetermined period, the level of the electric field received during a guide time period between transmitted and received bursts, and averages an obtained integrated value. To the averaged value, a threshold generator adds a predetermined value to generate a threshold. A comparator compares the received level of the electric field with the threshold to thereby detect a carrier. That substantially prolongs the detection distance, thereby widening a communication area. The carrier detector is synchronized with an analog-to-digital (A/D) converter clock signal, and carries out moving integration on an output value of the received level of the electric field to provide a result from the integration as a value to be compared, which is in turn compared with the threshold value to thereby detect a carrier.
Those three radio LAN systems described above are structured such that receivers can assuredly detect transmitted signals under any environmental condition. However, those receivers are designed without considering power consumption so that they are not efficient in respect of consumed current, because the signal detection utilizing a synchronizing function in a receiver is based on the operations of the entire analog circuitry of the receiver and of an analog-to-digital converter (ADC) in the receiver, an AGC (Automatic Gain Control) circuit in the signal processor and the receiver synchronization circuit. For a mobile phone terminal equipped with a receiver and powered by a battery, for example, power consumption in the unit is particularly required to be reduced as low as possible.
The digital synchronous radio system disclosed in Japanese patent laid-open publication No. 2003-273796 has a structure in which, for the purpose of reducing electric power consumption during a standby period for which data are neither transmitted nor received between a parent station and its member stations, the power supply to a transmitter of the parent station is suspended by a first controller during a period for which signals are neither transmitted nor received, and the first controller is responsive to a detection of an RSSI voltage having a level higher than a predetermined level or of predetermined demodulated data to thereby determine a call origination to turn on the transmitter in response. The system disclosed in the Japanese publication focuses attention on reduction of electric power consumption only in the transmitter and not in the receiver. Accordingly, in view of reduction of electric power consumption in the whole system, such a way of reduction is not satisfactory.